The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device, and more particularly to a 3D non-volatile memory device, a memory system including the 3D non-volatile memory device, and a method of manufacturing the 3D non-volatile memory device.
Technology for a memory device has been developed in a direction capable of improving an integration degree. Generally, in order to improve the density of the memory device, methods of reducing sizes of two-dimensionally arranged memory cells have been developed. According to the reduction of the size of the memory cell of a two-dimensional (2D) memory device, interference and disturb are increased. As a result, it is difficult to perform a Multi Level Cell (MLC) operation. In order to overcome a limitation of the 2D memory device, a memory device having a three-dimensional (3D) structure for improving a density by three-dimensionally arranging memory cells on a substrate has been suggested. The memory device having the 3D structure may efficiently utilize an area of the substrate, so that the density may be improved compared to a case in which the memory cells are two-dimensionally arranged.
The memory cells of the 3D memory device include conductive layers and interlayer insulating layers that are alternately deposited, and vertical channel layers passing through the conductive layers and the interlayer insulating layers. In order to improve reliability of the 3D memory device, various techniques have been recently suggested.